As the electronics industry trends towards lighter, thinner and more miniaturized electrical components, the demand for precise circuitry and thin copper foil has increased. Consumer electronics are requiring more integrated circuits in an integrated circuit package while paradoxically providing less physical space to house the increased integrated circuit package. Electrodeposited copper foil including a carrier foil can be used by the electronics industry for manufacturing high precision and density circuitry in printed circuit board assemblies.
There are two general types of electrodeposited copper foil that include a carrier foil, the peelable-type and the etchable-type. The peelable-type is defined by physically removing the carrier foil after the formation of the copper clad laminate substrate while the etchable-type is defined by chemically removing the carrier foil after the formation of the copper clad laminate substrate. Conventionally, peelable-type electrodeposited copper foils with a carrier have been widely employed for producing copper-clad laminates, by laminating the copper foil with a substrate through hot pressing and then peeling off the carrier attached to the electrodeposited copper foil. The peel strength at the release interface between the carrier and the copper foil varies over a wide range. Some electrodeposited copper foils with carrier layers exhibit easy peeling during handling while others fail to adequately peel after hot pressing.
The conventional electrodeposited copper foil includes a carrier foil (copper or aluminum foil), a release layer often formed with metal oxides or organic compounds on the carrier foil, and a ultra-thin (or super-thin) copper foil that is formed on the release layer. When the carrier foil is physically removed from the ultra-thin copper foil, the surface of the ultra-thin copper foil has a shiny appearance. However, when the ultra-thin copper foil is applied to inner layers of a multilayer circuit board, a blackening or browning process is used to enhance bonding to the substrate.
Ultra-thin copper foil that is used for micro-thin circuit patterns is often formed by electrolytic deposition directly on a release layer of the carrier foil. An ideal thickness for the ultra-thin copper is below 5 μm. The surface morphology of the carrier foil directly impacts the release layer and the ultra-thin copper foil. Thus, when the carrier layer surface roughness is high, the subsequent electroplated ultra-thin copper foil also tends to have a high roughness, thereby influencing the subsequent etching. Likewise, if the carrier foil has pinholes, the ultra-thin copper foil will also tend to have pinholes. Because the carrier foil is the basis for the release layer and the ultra-thin copper foil, the choice of the carrier copper foil can be very important.
During the manufacturing of printed circuit boards, high density and precision circuitry components such as microvias are often created using laser drilling. The shiny surface of the ultra-thin copper foil, however, has a tendency to reflect the laser rays. Therefore, stronger laser rays are required, which consume more energy. Furthermore, during high temperature compression process, the temperature of the ultra-thin copper foil can reach as high as 300° C., and the metallic bonding formed via an oxidation-reduction reaction between the metal oxides and the copper metal may affect consistency in peeling strength.
Recently, multilayer structures have been widely employed in printed wiring boards for miniaturization of the printed wiring boards by increased wiring density of the printed wiring boards. Multilayer printed wiring boards are used in many mobile electronic devices to achieve downsizing. Accordingly, multilayer printed wiring boards require both further thickness reduction in interlayer insulating layers and further weight reduction.
Consumer electronics requirements demand more integrated circuits in an integrated circuit package while paradoxically providing less physical space in the system for the increased integrated circuits content. As a technology which satisfies such requirements, a manufacturing method employing the coreless build-up method have been used. In the coreless build-up method, a copper foil with carrier foil has been utilized for separation between the supporting substrate and the multilayer printed wiring board. As the patterns were built on ultra-thin copper layer, fine pitch was achieved.